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cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 1/11 MTN4N65I3 cystek product specification n-channel enhancement mode power mosfet MTN4N65I3 description the MTN4N65I3 is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. the to-251 package is universally preferred for all commercial-industrial applications features ? low on resistance ? simple drive requirement ? low gate charge ? fast switching characteristic ? rohs compliant package applications ? open framed power supply ? adapter ? stb symbol outline MTN4N65I3 to-251 to-251s g gate d drain s source bv dss : 650v r ds(on) : 3.0 (typ.) i d : 4a g d s g d s
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 2/11 MTN4N65I3 cystek product specification ordering information device package shipping MTN4N65I3-0-ua-g to-251 (rohs compliant and halogen-free package) 80 pcs/tube, 50 tubes/box MTN4N65I3s-0-ua-g to-251s 80 pcs/tube, 50 tubes/box (rohs compliant and halogen-free package) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ua : 80 pcs / tube, 50 tubes/box product rank, zero for no rank products product name absolute maximum ratings (t c =25 c) parameter symbol limits unit drain-source voltage v ds 650 v gate-source voltage v gs 30 v continuous drain current i d 4 a continuous drain current @t c =100c i d 2.4 a pulsed drain current @ v gs =10v (note 1) i dm 16 a single pulse avalanche energy (note 2) e as 69 mj avalanche current (note 1) i ar 4 a repetitive avalanche energy (note 1) e ar 4.8 mj peak diode recovery dv/dt (note 3) dv/dt 4.5 v/ns maximum temperature for solder ing @ lead at 0.125 in(0.318mm) from case for 10 seconds t l 300 c total power dissipation (t a =25 ) 1.14 w w total power dissipation (t c =25 ) linear derating factor p d 48 0.38 w/ c operating junction and storage temperature tj, tstg -55~+150 c note : 1 . repetitive rating; pulse width limited by maximum junction temperature. 2 . i as =4a, v dd =50v, l=8mh, r g =25 , starting t j =+25 . 3 . i sd 4a, di/dt 100a/ s, v dd bv dss , starting t j =+25 . thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2.6 c/w thermal resistance, junction-to-ambient, max r th,j-a 110 c/w
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 3/11 MTN4N65I3 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 650 - - v v gs =0, i d =250 a, tj=25 ? bv dss / ? tj - 0.6 - v/ c reference to 25c, i d =250 a v gs(th) 2.0 - 4.0 v v ds = v gs , i d =250 a *g fs - 2.3 - s v ds =15v, i d =2a i gss - - 100 na v gs = 30 - - 1 a v ds =650v, v gs =0 i dss - - 10 a v ds =520v, v gs =0, t c =125 c *r ds(on) - 3.0 3.5 v gs =10v, i d =2a dynamic *qg - 11 - *qgs - 2.6 - *qgd - 4.6 - nc i d =4a, v dd =520v, v gs =10v *t d(on) - 15 - *tr - 33 - *t d(off) - 30 - *t f - 37 - ns v dd =325v, i d =4a, v gs =10v, r g =25 ciss - 568 - coss - 51 - crss - 9.6 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode *v sd - - 1.5 v i s =4a, v gs =0v *i s - - 4 *i sm - - 16 a *trr - 280 - ns *qrr - 2 - c v gs =0, i f =4a, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 4/11 MTN4N65I3 cystek product specification typical characteristics typical output characteristics 0 1 2 3 4 5 6 7 0 102030405060 drain-source voltage -v ds (v) drain current - i d (a) v gs =4.5v 15v 10v 9v 7v 5v 5.5v 6v static drain-source on-resistance vs ambient temperature 1 2 3 4 5 6 7 -100 -50 0 50 100 150 ambient temperature-ta(c) static drain-source on-state resistance-r ds( on) () i d =2a, v gs =10v static drain-source on-state resistance vs drain current 2 4 6 0.1 1 10 drain current-i d (a) static drain-source on-state resistance- r ds(on) () v gs =10v drain current vs gate-source voltage 0 0.5 1 1.5 2 2.5 3 3.5 4 0 5 10 15 20 gate-source voltage-v gs (v) drain current-i d(on) (a) ta=25c v ds =10v static drain-source on-state resistance vs gate-source voltage 0 5 10 15 20 024681012 gate-source voltage-v gs (v) static drain-source on-state resistance-r ds(on) () i d =2a ta=25c body diode forward voltage variation with source current and temperature 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 source drain voltage -v sd (v) reverse drain current-i dr (a) v gs =0v ta=25c ta=150c
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 5/11 MTN4N65I3 cystek product specification typical characteristics(cont.) capacitance vs reverse voltage 1 10 100 1000 0 5 10 15 20 25 30 drain-to-source voltage-v ds (v) capacitance-(pf) ciss coss crss f=1mhz brekdown voltage vs ambient temperature 600 650 700 750 800 850 -100 -50 0 50 100 150 200 ambient temperature-tj(c) drain-source breakdown voltage bv dss (v) i d =250a, v gs =0v maximum safe operating area 0.01 0.1 1 10 100 1 10 100 1000 drain-source voltage -v ds (v) drain current --- i d (a) operation in this area is limited by rds(on) dc 10ms 100ms 1ms 100 s 10 s single pulse tc=25c tj=150c gate charge characteristics 0 2 4 6 8 10 12 024681012 total gate charge---qg(nc) gate-source voltage---vgs(v) i d =4a vds=130v vds=325v vds=520v maximum drain current vs case temperature 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 25 50 75 100 125 150 175 case temperature---t c (c) maximum drain current---i d (a)
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 6/11 MTN4N65I3 cystek product specification typical characteristics(cont.) transient thermal response curves 0.01 0.1 1 10 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) z jc (t), thermal response single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.z jc (t)=2.6 c/w max. 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *z jc (t)
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 7/11 MTN4N65I3 cystek product specification test circuit and waveforms
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 8/11 MTN4N65I3 cystek product specification test circuit and waveforms(cont.)
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 9/11 MTN4N65I3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 10/11 MTN4N65I3 cystek product specification to-251 dimension style: pin 1.gate 2.drain 3.source 3-lead to-251 plastic package cystek packa g e code: i3 marking: cys 4n65 product name date code inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.2500 0.2618 6.35 6.65 i 0.0866 0.0945 2.20 2.40 b 0.2047 0.2126 5.20 5.40 j 0.2126 0.2244 5.40 5.70 c 0.5709 0.5866 14.50 14.90 k 0.2992 0.3071 7.60 7.80 d 0.0276 0.0354 0.70 0.90 l 0.0453 0.0492 1.15 1.25 e 0.0199 0.0276 0.50 0.70 m 0.0169 0.0228 0.43 0.58 f 0.0886 0.0925 2.25 2.35 n 0.1181 ref 3.00 ref g 0.0886 0.0925 2.25 2.35 s 0.1969 ref 5.00 ref h 0.0169 0.0228 0.43 0.58 t 0.1496 ref 3.80 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0.
cystech electronics corp. spec. no. : c797i3 issued date : 2010.03.29 revised date : 2013.10.18 page no. : 11/11 MTN4N65I3 cystek product specification to-251s dimension inches marking : style : pin 1. gate 2. drain 3. source 3-lead to-251s plastic package cystek package code: i3 device name date code millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.2559 0.2638 6.50 6.70 j 0.2362 0.2441 6.00 6.20 b 0.2020 0.2126 5.13 5.46 k 0.1299 0.1457 3.30 3.70 c 0.4094 0.4331 10.40 11.00 l 0.0358 0.0437 0.91 1.11 e 0.0280 0.0319 0.71 0.81 m 0.0181 0.0220 0.46 0.56 f 0.0858 0.0941 2.18 2.39 s 0.1902 ref 4.83 ref g 0.0858 0.0941 2.18 2.39 t 0.2106 ref 5.35 ref h 0.0181 0.0220 0.46 0.56 u 0.0701 ref 1.78 ref i 0.0902 0.0937 2.29 2.38 v 0.0299 ref 0.76 ref notes: 1.controlling dimension: inch. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .

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